1. Technical Field
Embodiments of the present invention relate to a test device for testing a semiconductor device, a semiconductor device, a semiconductor device and a testing method thereof and more particularly to a test device for testing a semiconductor device, a semiconductor device and a testing method thereof to test whether a TSV (Thru Silicon Via) included in a semiconductor device is formed without defects such as a crack therein and whether the TSV is connected to a metal layer or not.
2. Related Art
FIG. 1 illustrates a semiconductor device 7 comprising a semiconductor substrate 1 including a TSV 3 and an upper structure 4 formed on the semiconductor substrate 1.
An insulator layer 2 is formed between the semiconductor substrate 1 and the TSV 3. The upper structure 4 includes a metal layer 5 connected to the TSV 3 and an insulating layer 6.
A test process is performed when manufacturing a semiconductor device to test for defects such as whether a metal layer 5 is connected to a TSV 3 and/or whether a TSV 3 is formed without a crack therein.
In a conventional process, the semiconductor substrate 1 is ground to expose the bottom of the TSV 3 and the resistance between the exposed TSV 3 and the metal layer 5 was measured to test connectivity between the metal layer 5 and TSV 3 and/or to test for the presence of defects such as a crack in the TSV 3.
The grinding and measuring resistance add cost and complexity to the manufacturing process.